A continuing area of developing computer technology involves the transfer of data between a main host computer system and one or more peripheral terminal units. To this end, there have been developed I/O subsystems which are used to relieve the monitoring and housekeeping problems of the main host computer and to assume the burden of controlling peripheral terminal units and to control the execution of data transfer operations which need to occur between the peripheral terminal units and the main host computer system.
A particular series of I/O subsystems has been developed which uses peripheral controllers known as "data link processors" whereby initiating commands from the main host computer are forwarded to the data link processor which manages the data transfer operations with one or more peripheral units. In these systems, the main host computer provides a "data link word" which identifies each task that has been initiated for the data link processor. After the completion of the given task, the data link processor will notify the main host computer system with a result-descriptor word to inform it as to the completion, incompletion, or problem involved in that particular task.
These types of data link processors or peripheral controllers have been described in a number of patents issued to the assignee of the present disclosure and these patents are included herein by reference as follows:
U.S. Pat. No. 4,106,092 issued Aug. 8, 1978 entitled "Interface System Providing Interfaces to Central Processing Unit and Modular,Processor-Controllers for an Input Output Subsystem", inventor D. A. Millers, II.
U.S. Pat. No. 4,074,352, issued Feb. 4, 1978, entitled "Modular Block Unit for Input-Output Subsystem", inventors D. J. Cook and D. A. Millers, II.
U.S. Pat. No. 4,162,520, issued July 24, 1979, entitled "Intelligent Input-Output Interface Control Unit for Input-Output Subsystem", inventors D. J. Cook and D. A. Millers, II.
U.S. Pat. No. 4,189,769, issued Feb. 19, 1980, entitled "Input-Output Subsystem for Digital Data Processing System", inventors D. J. Cook and D. A. Millers, II.
U.S. Pat. No. 4,280,193, issued July 21, 1981, entitled "Data Link Processor for Magnetic Tape Data Transfer System", inventors K. W. Baun and J. G. Saunders.
U.S. Pat. No. 4,313,162, issued Jan. 26, 1982, entitled "I/O Subsystem Using Data Link Processors", inventors K. W. Baun and D. A. Millers, II.
U.S. Pat. No. 4,390,964, issued June 28, 1983, entitled "Input-Output Subsystem Using Card Reader-Peripheral Controller", inventors J. F. Horky and R. J. Dockal. This patent discloses the use of a distribution card unit used to connect and disconnect the data link processor (peripheral controller) to/from a host computer as required to accommodate data transfer operations.
The above referenced patents, which are included herein by reference, provide a background and understanding of the use of the type of specialized peripheral-controllers known as "data link processors" (DLP) which are used in data transfer networks between a main host computer and various types of peripheral terminal units.
The present disclosure involves systems whereby "dual-ported" disk drive units are networked with these data link processors (peripheral-controllers) to provide a mutual intercooperation system for Read/Write operations on any one of a group of disk drive units.
The present data transfer systems use a peripheral-controller called the storage module device-data link processor (SMD-DLP) which provides features and solutions which were not available in earlier versions of similar data link processors.
For example, some peripheral-controllers (DLP's) required an "Emergency Request" cycle from DLP to the host computer to establish a communication channel for data transfer service when conditions of overload or underload occurred. This was especially so in systems using magnetic tape peripherals.
In the peripheral-controllers described herein for disk drive modules, this need for an "Emergency Request" cycle is eliminated since the disk data can easily be accessed or not on the next turn of the disk and since the amount of data in a sector is of a limited quantity. Another feature in the described peripheral-controllers is the use of "one logical address" to select an area of two physical sectors of data wherein the least significant bit (LSB) of the address field will select either the first or second physical sector.
To handle the situation of different characteristics of various disk drive units, an attribute table in a PROM (of the peripheral-controller) is used to provide information to the SMD-DLP as to "characteristics" of the selected disk drive module. This PROM table informs the DLP as to sector numbers, beginning addresses, ending addresses, number of track-heads available in a particular disk unit, and the number of bytes per track in each unit. Thus, rapid and accurate sector location and data transfer operations can occur.
Since two sets of interface unit cards are used to communicate with two groups of disk drives (each group handling four (4) disk drive modules), the selection of one interface card is accomplished through a unit select logic circuit after verification that only one disk unit has properly responded for use in data transfer operations.
The handling of up to eight disk drives by one data link processor (DLP) is facilitated by a queue file section in buffer memory which can store up to eight I/O commands for later execution. However, the system also provides for immediate execution of an I/O command even while commands remain stored in the queue file.
These and other features are provided by the described data link processor for multiple disk drive modules.